Synergistic Hybrid GDI–CNTFET Architecture for Low-Power and Area-Optimized Nanoscale VLSI Circuits. ITEGAM-JETIA, [S. l.], v. 12, n. 60, p. 344–355, 2026. DOI: 10.5935/jetia.v12i60.3834. Disponível em: https://itegam-jetia.org/journal/index.php/jetia/article/view/3834. Acesso em: 22 oct. 2026.