«Glitch-Free Clock Distribution Using Flip-Flop–Controlled Clock Gating in a 32-Bit RISC-V Architecture». ITEGAM-JETIA 12, no. 59 (junio 25, 2026): 2130–2135. Accedido octubre 22, 2026. https://itegam-jetia.org/journal/index.php/jetia/article/view/3833.