“Synergistic Hybrid GDI–CNTFET Architecture for Low-Power and Area-Optimized Nanoscale VLSI Circuits”. ITEGAM-JETIA 12, no. 60 (julho 31, 2026): 344–355. Acesso em outubro 22, 2026. https://itegam-jetia.org/journal/index.php/jetia/article/view/3834.