New Reconfigurable Implementation of Parallel Intra Prediction Algorithm in Versatile Video Coding

Abstract

Versatile Video Coding (VVC/H.266) introduces significantly enhanced intra prediction technique compared to its predecessors, leading to notable compression efficiency gains, especially for high-resolution and screen content. However, these improvements come at the price of more complexity implementation. VVC intra prediction modes are planar, Direct Component (DC), angular and a novel one Cross-Component Linear Model Prediction (CCLM). This paper presents a novel parallel architecture and an effective FPGA-based implementation of intra prediction algorithm in VVC codec. The intra prediction modes are designed and implemented separately on hardware and software environments in order to validate our proposed solution. After that, full intra prediction design is presented by combining four previously modes and by introducing parallel technique. The improvements of our work are given on three levels, firstly, our FPGA parallel intra prediction implementation can process 6 samples and operate with a good frequency value of 178 Mhz (throughput of 1068 samples/s) with acceptable number of resources in terms of 12000 LUTs. Secondly, the obtained area efficiency is about 0.089 samples/s/ LUTs which is better to that given in literature for VVC intra prediction algorithm. Finally, this work is the only which presents full FPGA implementation of VVC intra prediction.