Implementation and Simulation of Switched-Capacitor Passive RC Integrator in Deep Submicron Technology

Mehulkumar Patel; Kehul Shah; Haresh Judal; Devendra Patel; Roshni Chaudhari

doi:10.5935/jetia.v12i60.4355

Autores/as

Mehulkumar Patel Electronics & Communication Engineering Department, Government Engineering College Patan, Gujarat, India.
Kehul Shah Assistant Registrar,Academics, Institute of Technology, Nirma University, Gujarat, India.Assistant Registrar,Academics, Institute of Technology, Nirma University, Gujarat, India.
Haresh Judal Electronics & Communication Engineering Department, Government Engineering College Patan, Gujarat, India.
Devendra Patel Electronics & Communication Engineering Department, Government Engineering College Patan, Gujarat, India.
Roshni Chaudhari Electronics & Communication Engineering Department, Government Engineering College Patan, Gujarat, India.

DOI:

https://doi.org/10.5935/jetia.v12i60.4355

Resumen

Switches and capacitors are utilized in place of a resistor R in the switched-capacitor circuit, with a MOSFET serving as the switch. In this paper, the standard RC integrator is compared with the switch capacitor RC integrator. The design is simulated first, and solutions to the design issues are explored and implemented in 180nm technology. The analysis demonstrates that NMOS transistor performance strongly depends on the W/L ratio. As resistance decreases sharply with increasing W/L, current delivery efficiency enhances. Drain current increases substantially with larger widths due to improved channel conduction. This study analyzes the electrical behavior of an NMOS transistor for varying device widths while keeping the channel length constant. The investigation focuses on the effect of the width-to-length (W/L) ratio on drain current (I_D), on-resistance (Ron), and related process parameters. The results demonstrate a strong dependence of I_D and R_on on device geometry, consistent with MOSFET theory.